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automotive power data sheet 1.3, 2015-02-06 btc50010-1taa smart high-side power connector single channel, 1m ?
data sheet 2 1.3, 2015-02-06 connect fet btc50010-1taa table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.1 pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3.3 voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 general product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.2 functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1.1 output on-state resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1.2 switching an inductive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.2 gate driver functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3 undervoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.4 overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.5 protection during loss of load or loss of v s condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.6 inverse current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.7 reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.8 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 6.1 information for application combining pwm mode with fuse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.2 information for driving capability of charge pump pin after switch on . . . . . . . . . . . . . . . . . . . . . . 27 6.3 further application informat ion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 7 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 table of contents
type package marking btc50010-1taa pg-to-263-7-8 c50010a pg-to-263-7-8 data sheet 3 1.3, 2015-02-06 connect fet high-side power connector btc50010-1taa 1overview applications ? switching resistive, capacitive and inductive loads in conjunction with an effective peripheral free wheeling circuit ? replaces electromechanical relay ? most suitable for high current applic ations, such as start-stop, power distribution, main switch, heating systems ? pwm application with low frequencies features ? load or supply line switching up to 30 a dc ? operating temperature up to 150c ? current controlled input pin ? low stand-by current ? single channel 1mohm power stage device with gate dr iver output for driving external mosfet, easily combine with external mosfet for reverse blocking or to halve the r ds(on) (with btc30010-1taa). auxiliary gate driver output for driving additional exte rnal mosfet (optimized for btc30010-1taa). ? electrostatic discharge protected (esd) ? optimized electro magn etic compatibility (emc) ? very low power consumption in on state ? compatible to cranking pulse requirement (test pu lse 4 in iso7637 and cold start pulse in lv124) ?infineon ? reversave?: reverse battery protection by self turn on of the power mosfet ? inverse operation robustness capability ?infineon ? smart clamping ? green product (rohs compliant, halogen free package) ? aec qualified ? dustproof description the btc50010-1taa is a high-side power connector optimized to replace electromechanical relays. it offers switching without audible noise, low conductive losses, weight reduction and increased switching cycle capability to comply with upcoming requirements on power distributi on applications such as load or battery disconnect
btc50010-1taa overview data sheet 4 1.3, 2015-02-06 connect fet switch. in addition, it significantly reduces power/current consumption of the device while on to increase energy efficiency. it offers the possibility to drive an additional power mosfet or btc30010-1taa via its cp pin to support reverse blocking or to halve the r ds(on) . the device can withstand cranking pulses such as test pulse 4 in iso7637 and cold start pulse in lv124. table 1 product summary parameter symbol values weight (approx.) g 1.5 g nominal operating voltage v s(op) 8v ? 18v extended operating voltage contai ns dynamic undervoltage capability v s(dyn) 3.2 v ? 28 v nominal load current i l(nom) 30 a typical on-state resistance at t j = 25 c (cp pin open) r ds(on) 0.9 m ? typical input current in on state i in(on) 2ma typical stand-by current at t j = 25 c i s(off) 3a
btc50010-1taa block diagram data sheet 5 1.3, 2015-02-06 connect fet 2 block diagram figure 1 block diagram v s out in1 driver logic gate control & charge pump esd protection cp internal power supply r vs on mode control in2 smart clamp v z = 6v pu ll-up curren t source z (a z )i n
btc50010-1taa pin configuration data sheet 6 1.3, 2015-02-06 connect fet 3 pin configuration 3.1 pin assignment figure 2 pin configuration 3.2 pin definitions and functions pin symbol function 1in1 in1 ; pull down to module ground for channel activation 1) 1) in1 and in2 are internally connected 2in2 in2; pull down to module ground for channel activation 1) 3cp charge pump output; output pin of internal charge pump voltage 4, cooling tab vs supply voltage; connected to battery voltage 5, 6, 7 out output; high side power output 2) 2) all output pins are connected internally. all output pins have to be connected ex ternally together on pcb. not shorting all outputs pins will considerably increase the on-resistance. pcb traces have to be designed to withstand the maximum current which can flow. 123 4 57 6
btc50010-1taa pin configuration data sheet 7 1.3, 2015-02-06 connect fet 3.3 voltage and current definition figure 3 shows all terms used in this data sheet, wit h associated convention for positive values. figure 3 voltage and current definition v s in1 cp out i in v s v in i s v ds v out i l in2 module ground v cp connect in1 or / and in2 i cp v sin v s( re v) v out- in
btc50010-1taa general product characteristics data sheet 8 1.3, 2015-02-06 connect fet 4 general product characteristics 4.1 absolute maximum ratings table 2 absolute maximum ratings 1) t j = -40 c to +150 c, all voltages and currents refer to definitions in figure 3 (unless otherwise specified). parameter symbol values unit note / test condition number min. typ. max. voltages supply voltage v s -0.3 ? 28 v ? p_4.1.1 voltage from v s to in pin v sin -0.3 ? 60 v ? p_4.1.2 reverse polarity voltage v s(rev) ?? 16 v t < 2 min t a = 25 c r l 0.5 ? v in = 0 v figure 18 figure 19 p_4.1.3 supply voltage for load dump protection v s(ld) ?? 45 v 2) r l = 1.0 ? r in = 100 ? p_4.1.4 voltage at cp pin v cp -0.3 ? v cp_on v v cp = v gs_c p_4.1.5 voltage from out to in pin v outin = v out - v in v out-in -64 ? ? v 3) p_4.1.6 currents current through cp pin i cp -20 ? 20 ma for t < 0.5 ms during switch on/off p_4.1.7 device current vs. time capability at: i 6.0_125c = 0.85 x 6.0 x i rate for i rate = 30a 4) t @ i 6.0 ? ? 0.24 s 5) btc50010-1taa alone or drive btc30010-1taa in anti serial, current level: i 6.0_125c = 153 a, t a = 125 c, figure 4 p_4.1.8 continuous drain current i d ?? 163 a t c = 25 c v in = 0 v, i cp 2a current is limited by bondwire p_4.1.9 power stage average power dissipation p tot ?? 160 w 6) for t j(0) 105 c p_4.1.13 temperatures junction temperature t j -40 ? 150 c ? p_4.1.14 dynamic temperature increase while switching ? t j ?? 60 k? p_4.1.15
btc50010-1taa general product characteristics data sheet 9 1.3, 2015-02-06 connect fet storage temperature t stg -55 ? 150 c ? p_4.1.16 esd susceptibility esd susceptibility (all pins) v esd -2 ? 2 kv hbm 7) p_4.1.17 esd susceptibility out pin vs. v s v esd_out -4 ? 4 kv hbm 7) p_4.1.18 1) not subject to production test, specified by design. 2) v s(ld) is setup without dut connected to the generator per iso 7637-1. 3) relevant to application case such as loss of load, loss of battery (also negative iso pulse). 4) i q_b_125c = a x b x i rate . ?a? is the temperature re-rating factor from the fu se curve for 125c refer to 25c. ?b? is the factor of load current to i rate at 25c. 5) use test pcb with 2 x 70 m cu layers and size of 54 x 48 x 1.5 mm. where applicable, thermal via array is placed under the device footprint on this pcb. btc50010-1taa on pcb has r thja(2p) = 19.6 k/w (referring to 1w power dissipation ). pcb is vertical, keep constant environment temperature by indirect airflow of 6l/s. 6) p tot = ( t j(0) - t c ) / r thjc . p tot_max = (105c - 25c) / 0.5 k/w = 160 w. 7) esd susceptibility, hbm according to ansi/esda/jedec js-001-2010. table 2 absolute maximum ratings (cont?d) 1) t j = -40 c to +150 c, all voltages and currents refer to definitions in figure 3 (unless otherwise specified). parameter symbol values unit note / test condition number min. typ. max.
btc50010-1taa general product characteristics data sheet 10 1.3, 2015-02-06 connect fet btc50010-1taa current robustness: below diagram present the current robustness of btc5 0010-1taa. generally, module thermal characteristic is more depending on the module construction (e.g. pcb size, metal layer thickness and numbers, module connectors) than the thermal characteri stic of btc50010-1taa alone. when current pulse is longer than 0.3s, influence of module thermal characteristic is dominant. when current pulse is shorter than 0.3s, influence of thermal characteristic of btc50010-1taa is getting significant. combining btc50010-1taa together with a fuse in applicat ion, the total i/t curve of the module (incl. btc50010- 1taa) has to be above the fuse i/t curve. with specified test setup 1) btc50010-1taa can withstand minimum 10 fuse blows of a 30a ato fuse. figure 4 btc50010-1taa current robustness at t a = 25c and t a = 125c; v s = 13.5v 1) notes 1. stresses above the ones described in chapter 4.1 may cause permanent damage to the device. exposure to absolute maximum rating cond itions for extended periods may affect device reliability. 1) use test pcb with 2 x 70 m cu layers and size of 54 x 48 x 1.5 mm. where applicable, thermal via array is placed under the device footprint on this pcb. btc50010-1taa on pcb has rthja(2p) = 19.6 k/w (referring to with 1 w power dissipation). pcb is vertical, keep constant environment temperatur e by indirect airflow of 6l/s. 0,01 0,1 1 10 100 1000 10 100 1000 time [s] current [a] btc50010-1taa current robustness at t a =125c and t a =25c, vs=13.5v pcb is vertical, keep constant enviroment temperature by airflow device absolute max. ratings @ta=125c device absolute max. ratings @ta=25c
btc50010-1taa general product characteristics data sheet 11 1.3, 2015-02-06 connect fet 2. integrated protection func tions are designed to prevent ic destructi on under fault conditions described in the data sheet. fault conditions are considered as ?outside? normal operating range. pr otection functi ons are not designed for continuous repetitive operation. 4.2 functional range note: within the functional range the ic operates as de scribed in the circuit description. the electrical characteristics are specifi ed within the conditions given in the re lated electrical ch aracteristics table. table 3 functional range t j = 25 c, all voltages and currents refer to definitions in figure 4 (unless otherwise specified). parameter symbol values unit note / test condition number min. typ. max. nominal operating voltage v s_op 8?18v? p_4.2.1 extended static operating voltage v s_op_ext 5?28v 1) 2) i l i l(nom) 1) not subject to production test, specified by design. 2) within the range of v s_op_ext and out of the range of v s_op , device parameter deviation is possible. p_4.2.2 extended operating voltage contain dynamic undervoltage capability v s_dyn 3.2 ? 28 v 1) v s decreasing according to iso7637 according to lv124 p_4.2.3 static undervoltage level (start of loss of functionality) v s_uv ??4.5v r l =270 ? v s decreasing v ds 0.5 v i cp_on =0a figure 5 p_4.2.4 undervoltage restart level static v s_uv_restart ??5v r l =270 ? v s increasing v ds 0.5 v i cp_on =0a figure 5 p_4.2.5 charge pump current in on state (maximum allowed leakage current at cp pin) i cp_on 02 a v in = 0 v, t > t on p_4.2.6 maximum allowed current in off state in pins high i in_off ? ? 30 a pull-up current flow through internal current source p_4.2.7
btc50010-1taa general product characteristics data sheet 12 1.3, 2015-02-06 connect fet figure 5 undervoltage behavior of btc50010-1taa v out v s_uv_restart_max v s v s_uv_max v s_uv_restart v s_uv switch off restart
btc50010-1taa general product characteristics data sheet 13 1.3, 2015-02-06 connect fet 4.3 thermal resistance figure 6 is showing the typical thermal impedance of bt c50010-1taa mounted on different pcb setup on fr4 1s0p (single layer) and 2s2p (quad layer) boards at t j of 25c and 105c according to jedec jesd51-2,-5,-7 at natural convection. figure 6 typical transient thermal impedance z th(ja) = f (t) for different cooling areas table 4 thermal resistance 1) at t j = 25 c 1) not subject to production test, specified by design. parameter symbol values unit note / test condition number min. typ. max. junction to case r thjc ??0.5k/w 2) 2) device is dissipating 1w power. p_4.3.1 junction to ambient r thja(2s2p) ?20?k/w 2) 3) 3) specified r thja value is according to jedec jesd51-2,-5,-7 at natura l convection on fr4 2s2p board; the product (chip + package) was simulated on a 76,4 x 114,3 x 1,5 mm board with 2 inner copper layers (2 x 70 m cu, 2 x 35 m cu). where applicable, a thermal via array under the expos ed pad contacted the first inner copper layer. p_4.3.2 junction to ambient r thja(1s0p) ?70?k/w 2) 4) 4) specified r thja value is according to jedec jesd51-2,-5,-7 at natura l convection on fr4 1s0p board; the product (chip + package) was simulated on a 76,4 x 114,3 x 1, 5 mm board with 1 copper layer (1 x 70 m cu). p_4.3.3 0.001 0.01 0.1 1 10 100 1e-06 1e-05 0.0001 0.001 0.01 0.1 1 10 100 1000 10000 time [s] zth [k/w] 2s2p tj=105c 2s2p tj=25c 1s0p tj=105c 1s0p tj=25c
btc50010-1taa functional description data sheet 14 1.3, 2015-02-06 connect fet 5 functional description 5.1 power stage 5.1.1 output on-state resistance the on-state resistance r ds(on) depends on the supply voltage as well as the junction temperature t j . figure 16 shows the dependencies in terms of temperature and supp ly voltage, for the typica l on-state resistance. the behavior in reverse polarity is described in chapter 5.7 . a low signal (see chapter 5.2 ) at the input pin causes a current i in flowing internally from the v s pin out of the in pin to the module ground, thus the power dmos is switched on with a dedicated sl ope, which is optimized in terms of emc emission. 5.1.2 switching an inductive load when switching off inductive loads with high side switches, the voltage v out is driven below ground potential, due to the fact that the inductance intends to continue driv ing the current. to prevent the destruction of the device due to high voltages, the device implements an overvo ltage protection, which clamps the voltage between vs and vout at v ds(cl) (see figure 7 ). nevertheless it is not recommended to operate the device re petitively under this conditi on. therefore, when driving inductive loads, a free wheeling diode must be always placed. figure 7 overvoltage clamp v bat v out i l l, r l v s out v ds logic in v sin r in r vs z (az)in pull-up current source over- voltage clamp i in
btc50010-1taa functional description data sheet 15 1.3, 2015-02-06 connect fet figure 8 switching an inductance with or without free wheeling diode it is important to verify the effectiv eness of the freewheeling solution (see figure 8 ), which means the selection of the proper diode and of an appropriate free wheeling path . with regard to the choice of the free wheeling diode, low threshold and fast response are key pa rameter to achieve an effective result. moreover the diode should be placed in order to have the shortest wire connection with the load (see figure 9 ). figure 9 optimization of the free wheeling path i in v out i l v s v s -v ds(cl) t t t i in v out i l v s v s -v ds(cl) t t t without free wheeling diode with free wheeling diode inductive load free wheeling diode free wheeling diode not optimized free wheeling path recommended free wheeling path inductive load btc50010-1taa btc50010-1taa
btc50010-1taa functional description data sheet 16 1.3, 2015-02-06 connect fet 5.2 gate driver functionality btc50010-1taa has an embedded gate driver. it is used to drive the gate of an integrated power dmos. the gate driver charges and discharges the gate of the dmos with current i charge and i discharge . refer to figure 10 , the gate driver is accessible via the cp pin. btc50010- 1taa is suitable for driving an external mosfet (e.g. btc30010-1taa) in parallel to halve the connect resistance or in anti serial to block the reverse current. it allows also to connect a capacitor c cp to buffer the v cp voltage during cranking time. figure 10 gate driver block diagram during switch on, btc50010-1taa charges the gate capacitor of an external dmos or the capacitor c cp which is connected between cp and out pin. during switch off, when vout decreases to around 2.5v below v s , the internal switch s 1 between gate and sour ce will switch on to reduce the high energy consuming switch off time. additionally, when s 1 is switched on, the device is much more r obust against electromagnetic disturbance which could come from v s or output pin to ensure the device does n?t suffer from an unwanted switch on. v cp i charge i discharge v s out cp s 1
btc50010-1taa functional description data sheet 17 1.3, 2015-02-06 connect fet figure 11 switch on and off timing note: figure 11 shows the general switching behavior. under real condition, voltage or current sketch deviation is possible. 5.3 undervoltage protection below v s_uv maximum value, the under voltage condi tion is met. upon further decrease of v s , the device will begin to lose functionality, until fi nally it will turn off. during v s increasing, as soon as the supply voltage is above the static level v s_uv_restart , device can be switched on. figure 5 sketches the undervoltage mechanism. v out t on t on_delay t off 90% v s 10% v s t t off_delay 25% v s 50% v s i cp t i cp_sw_on i in t i cp_on i cp_sw _off 0 i in _ on i in _ o ff
btc50010-1taa functional description data sheet 18 1.3, 2015-02-06 connect fet 5.4 overvoltage protection the btc50010-1taa provides infineon ? smart clamping functionality, which suppresses over voltages by actively clamping the overvoltage acro ss the power stage and the load. this is achieved by controlling the clamp voltage v ds(cl) depending on the junction temperature t j and the load current i l . 5.5 protection during loss of load or loss of v s condition in case of loss of v s with charged line inductance s, the maximum supply voltage has to be limited. it is recommended to use a diode and a z-diode ( v z1 + v d1 < 16v, please refer to figure 12 ). figure 12 external component for btc50010-1taa loss of v s protection in case of loss of load with charged primary power li ne inductances, the maximum supp ly voltage also has to be limited. it is recommended to use a z-diode ( v z2 < 28v) or v s clamping power switches between v s and module ground (please refer to figure 13 ). v bat in r vs v s logic r in load v in z (az)in pull-up current source module r/l cable by case loss of vs v z1 ground r/l cable module ground v z1 b a external components according to either a or b is required, not both d 1 z 1 d 1 z 1 v d1 v d1
btc50010-1taa functional description data sheet 19 1.3, 2015-02-06 connect fet figure 13 external component for btc50010-1taa loss of load protection the 16v z-diode refers to the maximum v s(rev) voltage of the chip. the 28v z-diode refers to the maximum supply voltage ( v s ) of the chip. 5.6 inverse current capability in case of inverse current, meaning a voltage v out at the output higher than the supply voltage v s (e.g. caused by a load operating as a generator), a current i l will flow from output to v s pin via the body diode of the power transistor (please refer to figure 14 ). in case the in pin is low 1) , the power dmos is already activated and keeps on. in case, the input goes from ?h? to ?l?, the dm os will be activated. due to the limited speed of inv comparator, the output voltage slope needs to be limited. in case the in pin is high 2) , power dmos will not be switched on automatically. current will flow through the intrin sic body diode. this power dissipation could cause heating effect, which has to be considered. figure 14 btc50010-1taa inverse current circuitry 1) low means in pin is pulled-down by external transistor or i in > 0 2) high (h) means i in = 0 v bat in r vs v s logic r in load v in z (az)in pull-up current source module ground module ground by case loss of load r/l cable v z2 r/l cable out v s v bat -i l ol comp. v out v s inv comp. gate driver
btc50010-1taa functional description data sheet 20 1.3, 2015-02-06 connect fet 5.7 reverse polarity protection in case of reverse polarity, the intrinsic body diode of the power dmos causes power dissipation. to limit the risk of over temperature, the device provides infineon ? reversave? function. the power in this intrinsic body diode is limited by turning the dmos on. the dmos resistance is then equal to r ds(on)_rev (please refer to figure 18 and figure 19 ). additionally, the current into the logic has to be limited. the device includes a r vs resistor which limits the current in the diodes. to avoid over current in the r vs resistor, it is nevert heless recommended to use a r in resistor. figure 15 shows a typical application. th e recommended typical values for r in is 100 ? . figure 15 btc50010-1taa reverse polarity protection with external components note: the r vs has a typical value of 80 ? at 25c. refer to figure 15 , the r vs and r in build up a voltage divider to split up the supply voltage on btc50010-1taa, which protect the device during high voltage pulse (e.g. iso pulse 3b). in r vs v s v bat r in v in out i rvs - i l rev. on i in gnd dout control unit module ground z (az)in pull-up current source ground load
btc50010-1taa functional description data sheet 21 1.3, 2015-02-06 connect fet 5.8 electrical characteristics table 5 electrical characteristics: power stage v s = 13.5 v, t j = 25 c, all voltages and curr ents refer to definitions in figure 3 (unless otherwise specified). parameter symbol values unit note / test condition number min. typ. max. voltage drop v drop ?2736mv i l = 30 a p_5.8.1 on-state resistance r ds(on) ?0.91.2m ? cp pin open figure 16 p_5.8.2 on-state resistance hot r ds(on)_hot ??2.0m ? t j =150c figure 16 p_5.8.3 on-state resistance in infineon ? reversave? r ds(on)_rev ?0.9?m ? v in = 0 v p_5.8.4 on-state resistance during inverse operation r ds(on)_inv ?0.9?m ? v in = 0 v p_5.8.5 supply current stand-by in pins floating i s_off ? 3 12 a leakage current flow through out pin p_5.8.6 drain to source smart clamp voltage v ds(cl) = v s - v out v ds(cl) 28 ? 60 v i ds =50ma t j = 25 c to 150c p_5.8.7 table 6 electrical characteristics: input stage v s = 13.5 v, t j = 25 c, all voltages and curr ents refer to definitions in figure 3 (unless otherwise specified). parameter symbol values unit note / test condition number min. typ. max. input current in on state in pins low i in_on ?2 3ma v s = 18 v p_5.8.8 table 7 electrical characteristics: charge pump v s = 13.5 v, t j = 25 c, all voltages and curr ents refer to definitions in figure 3 (unless otherwise specified). parameter symbol values unit note / test condition number min. typ. max. charge pump current during switch on i cp_sw_on 0.7 2.2 ? ma v in =0v v cp =0v p_5.8.9 charge pump current during switch off i cp_sw_off 350 850 ? a v in = v s = 8 v v cp = v cp_on v out = v s p_5.8.10 charge pump voltage v cp_on 5?7v v in = 0 v figure 22 p_5.8.11
btc50010-1taa functional description data sheet 22 1.3, 2015-02-06 connect fet figure 16 typical r ds(on) of btc50010-1taa vs. v s table 8 electrical characteristics: timing v s = 13.5 v, t j = 25 c, all voltages and curr ents refer to definitions in figure 3 (unless otherwise specified). parameter symbol values unit note / test condition number min. typ. max. turn on time t on ? 200 500 s see timing figure 11 cp pin open p_5.8.12 turn off time t off ? 200 500 s see timing figure 11 cp pin open p_5.8.13 turn on delay time t on_delay ?80 150s figure 11 cp pin open p_5.8.14 turn off delay time t off_delay ? 180 300 s figure 11 cp pin open p_5.8.15 0 0.5 1 1.5 2 2.5 4.5 9.5 14.5 19.5 24.5 v s [v] typical r ds(o n ) [m ? ] 150c 25c -40c
btc50010-1taa functional description data sheet 23 1.3, 2015-02-06 connect fet figure 17 typical t off of btc50010-1taa by driving external capacitance on cp pin figure 18 typical r ds(on)_rev of btc50010-1taa vs. v s(rev) with v in = 0v in reverse mode for lower values of v s(rev) toff vs. load capacitance on cp pin 0.0 0.5 1.0 1.5 2.0 2.5 0 50 100 150 200 250 capacitance[nf] toff[ms] 150c 25c -40c 0 5 10 15 20 25 30 6.0 6.5 7.0 7.5 8.0 typical r ds(on)_rev [m ] v s(rev) [v] 150 c 25 c -40 c
btc50010-1taa functional description data sheet 24 1.3, 2015-02-06 connect fet figure 19 typical r ds(on)_rev of btc50010-1taa vs. v s(rev) with v in = 0v in reverse mode for higher values of v s(rev) 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 8 9 10 11 12 13 14 15 16 typical r ds(on)_rev [m ] v s(rev) [v] 150 c 25 c -40 c
btc50010-1taa application information data sheet 25 1.3, 2015-02-06 connect fet 6 application information this chapter describes how the ic can be used in the application environment. note: the following application information is only given as a hint for the implementation of the device in the application and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. figure 20 application diagram with btc50010-1taa table 9 bill of material reference value purpose t 1 npn or mosfet transistor npn (e.g. bcr133) or mosfet (e.g. bss123) transistor suitable for 5v voltage range controlled by control unit for driving the btc50010-1taa r in 100 ? protection of btc50010-1taa and the microcontroller or control unit during over voltage and reverse polarity, whic h could be created by huge negative pulse (like iso pulse 1) in1 cp out v s in2 t1 c out v bat r/l cable c vs fuse b depending on application requirement, either fuse a or fuse b will be placed r in btc50010 load za zb module ground za d g s control signal from control unit option a option b ground fuse a options for free wheeling path of inductive load optional: mosfet to block reverse current t2 module v z1 v z2 z 2 z 1 r/l cable
btc50010-1taa application information data sheet 26 1.3, 2015-02-06 connect fet 6.1 information for application combining pwm mode with fuse the maximum of average power dissipation 1) p loss is not allowed to be exceeded. above all, the condition of t dc > t fuseblow_max must be fulfilled. the t fuseblow_max is the maximum fuse blow time at certain fuse blow current on the i/t curve of the selected fuse for certain application. during short circuit, the load current could rise up to multiple of the nominal current value until fuse blow. the t dc is defined in figure 21 . p loss = (switching_on_energy + switching_off_energy + i l 2 * r ds(on) * t dc ) / t period figure 21 definition of average power dissipation of btc50010-1taa z 1 and z 2 zener diodes protection of the bt c50010-1taa during loss of load (correspond to fuse blow on fuse a) or loss of battery (correspond to fuse blow on fuse b) or against huge negative pulse (like iso pulse 1), please refer to figure 12 and figure 13 . z a and/or z b schottky diode zener transient suppressor protection of btc50010-1taa when dr iving an inductive load, stand alone (option b) or together with z b (option a). protection of btc50010-1taa when dr iving an inductive load, to be used together with z a in option a to accelerate the demagnetization process. t 2 mosfet transistor added optionally only for blocking the re verse current in free wheeling path, needed only for option a or b. fuse e.g. 30a ato fuse protection of the btc50010-1taa , wire harness and the load during short circuit. depending on applic ation requirement, either fuse a or fuse b will be placed. c vs 100 nf improve emc behavior (in layou t, please place it close to the pin) c out 10 nf improve emc behavior (in layout, please place it close to the pins) 1) in real application with r thj,a and t amb the maximum allowed average power dissipation is defined: p loss =(150c - t amb ) / r thj,a table 9 bill of material (cont?d) reference value purpose i in t i in _ o n i in _ off t p loss p t dc t period
btc50010-1taa application information data sheet 27 1.3, 2015-02-06 connect fet 6.2 information for driving capability of charge pump pin after switch on curve below shows typical driving capability of the ch arge pump, which has a de pendency on gat e voltage and battery voltage. it defines the relevant range of charge pump current for driving the gate capacity of the external mosfet device and/or an external capacity c cp . figure 22 typical charge pump current driv ing capability vs. ga te-source voltage ( v cp ) 6.3 further application information ? please contact us for information regarding the pin fmea ? for further information you may contact http://www.infineon.com/ 0 50 100 150 200 250 01234567 v cp [v] i cp [a] t = 150c t = 85c t = 25c t = -40c v out = v s = 13.5v
btc50010-1taa package outlines data sheet 28 1.3, 2015-02-06 connect fet 7 package outlines figure 23 pg-to-263-7-8 (rohs compliant) green product (rohs compliant) to meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. green products are rohs-compliant (i.e pb-free finish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). btc50010-1taa meets the msl 1 (moisture sens itivity level 1) according to ipc/jedec j-std-020d and can withstand until 245c peak reflow process. ?.2 gpt09063 10 8.5 1) (15) ?.2 9.25 ?.3 1 0...0.15 6 x 0.6 ?.1 ?.1 1.27 4.4 b 0.5 ?.1 ?.3 2.7 4.7 ?.5 ?.3 1.3 2.4 typical metal surface min. x = 7.25, y = 6.9 all metal surfaces tin plated, except area of cut. 1) 0.1 b 0...0.3 a 7.55 1) 6 x 1.27 m 0.25 ab 0.1 0.05 8? max. dimension in mm for further info rmation on alternative pa ckages, please visit our website: http://www.infineon.com/packages . dimensions in mm
btc50010-1taa revision history data sheet 29 1.3, 2015-02-06 connect fet 8 revision history revision date changes 1.0 2011-12-21 data sheet released 1.1 2012-06-15 page 3, application: in the first bullet point, ?inductive? removed page 8, parameter n ind (p_4.1.10) removed page 8, parameter n 0 (p_4.1.09) renamed as p_4.1.10 page 8, parameter i d (p_4.1.9) added page 9, parameter e ar (p_4.1.12) removed page 10, figure 4 modified, e ar curve removed page 10, figure 5 removed page 15, chapter 5.1.2 title modified note added page 19 ~ 20, chapter 5 .5 description modified page 19, figure 13 modified page 20, figure 14 and figure 15 modified page 21, figure 16 modified page 25, figure 20 modified page 26, figure 21 modified page 27, figure 22 and figure 23 modified page 30, figure 26 modified page 30, table 9: third row, first column, z 2 added; third row, third column, ?inductive? removed, ?please refe r to figure 13 and figure 14?added. page 31, figure 27 and table 10 added page 31, note ?the follo wing application informatio n represents only as a recommendation for switching an inductive load. the function must be verified in the real application? added 1.2 2012-11-16 page 8, note ?when driving resi stive loads with remain ing wire or parasitic inductances it must be en sured, that the device w ill not enter clamping mode during normal operating? added
btc50010-1taa revision history data sheet 30 1.3, 2015-02-06 connect fet 1.3 2015-01-26 comprehensive rewo rk of rev. 1.2; several figures have been renumbered chapter 1 : overview table 1 removed wording ?over life time?, updated various symbols applications : first, third and fourth bullet: changed wording features : change of wording description : change of wording chapter 3.2 : updated footnote 2 chapter 3.3 : figure 3 change v outin to v out-in chapter 4 : removed note chapter 4.1 : p_4.1.3: changed figure reference p_4.1.6: change v outin to v out-in p_4.1.8: removed cross reference p_4.1.10: removed from table p_4.1.11: removed from table p_4.1.18: change symbol name to v esd_out table 2 : correction within footnote 5 page 10 : footnote 1 modified removed figure about total energy capa bility for switch of f inductive loads reduced figures about current robustness chapter 4.3 page 13 : modified text chapter 5.1.2 : completely reworked subchapter chapter 5.2 : change of wording, removed re marks about energy capability. chapter 5.5 : modified figure 12 , figure 13 chapter 5.6 : modified text about negative load current, new footnote (1) about definition of low and high state chapter 5.7 : modified figure 15 chapter 5.8 p_5.8.11 add max. value p_5.8.12, p_5.8.13, p_5.8.14, p_5.8.15: add typical value figure 17 modified figure 18 , figure 19 new generated out of former figure chapter 6 : reworked text and note; removed figure 20, 21, 22, 23 list of required external components new figure 20 , updated table 9 removed former chapter 6.3 (now within chapter 6 ) chapter 6.1 : figure 21 and text modified revision date changes
edition 2015-02-06 published by infineon technologies ag 81726 munich, germany ? 2012 infineon technologies ag all rights reserved. legal disclaimer the information given in this docu ment shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, infine on technologies hereby disclaims any and all warranties and liabilities of any kind, including witho ut limitation, warranties of non-infrin gement of intellectua l property rights of any third party. information for further information on technology, delivery terms and conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the nearest infineon technologies office. infineon technologies compon ents may be used in life-su pport devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that de vice or system. life support devices or systems are intended to be implanted in the hu man body or to support an d/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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